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Real-Time Concepts for Embedded Systems

Real-Time Concepts for Embedded Systems
Название: Real-Time Concepts for Embedded Systems
Автор:Li Qing + Yao Carolyn
Оценка: 5.0 из 5, проголосовало читателей - 28
Жанр: компьютерная литература
Описание:Master the fundamental concepts of real-time embedded system programming and jumpstart your embedded projects with effective design and implementation practices. This book bridges the gap between higher abstract modeling concepts and the lower-level programming aspects of embedded systems development. You gain a solid understanding of real-time embedded systems with detailed practical examples and industry wisdom on key concepts, design processes, and the available tools and methods.

Delve into the details of real-time programming so you can develop a working knowledge of the common design patterns and program structures of real-time operating systems (RTOS). The objects and services that are a part of most RTOS kernels are described and real-time system design is explored in detail. You learn how to decompose an application into units and how to combine these units with other objects and services to create standard building blocks. A rich set of ready-to-use, embedded design building blocks  is also supplied to accelerate your development efforts and increase your productivity.

Experienced developers new to embedded systems and engineering or computer science students will both appreciate the careful balance between theory, illustrations, and practical discussions. Hard-won insights and experiences shed new light on application development, common design problems, and solutions in the embedded space. Technical managers active in software design reviews of real-time embedded systems will find this a valuable reference to the design and implementation phases.
About the Authors

Qing Li is a senior architect at Wind River Systems, Inc., and the lead architect of the company s embedded IPv6 products. Qing holds four patents pending in the embedded kernel and networking protocol design areas. His 12+ years in engineering include expertise as a principal engineer designing and developing protocol stacks and embedded applications for the telecommunications and networks arena. Qing was one of a four-member Silicon Valley startup that designed and developed proprietary algorithms and applications for embedded biometric devices in the security industry.

Caroline Yao has more than 15 years of high tech experience ranging from development, project and product management, product marketing, business development, and strategic alliances. She is co-inventor of a pending patent and recently served as the director of partner solutions for Wind River Systems, Inc.
Содержание:

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  1. Qing Li and Carolyn Yao Real-Time Concepts for Embedded Systems
  2. Preface
  3. Audience for this Book
  4. Acknowledgments
  5. Chapter 1: Introduction
  6. Overview
  7. 1.1 Real Life Examples of Embedded Systems
  8. 1.1.1 Embedded Systems in the Home Environment
  9. 1.1.2 Embedded Systems in the Work Environment
  10. 1.1.3 Embedded Systems in Leisure Activities
  11. 1.1.4 Defining the Embedded System
  12. 1.1.5 Embedded Processor and Application Awareness
  13. 1.1.6 Hardware and Software Co-Design Model
  14. 1.1.7 Cross-Platform Development
  15. 1.1.8 Software Storage and Upgradeability
  16. Read Only Memory (ROM)
  17. Random Access Memory (RAM)
  18. 1.2 Real-Time Embedded Systems
  19. 1.2.1 Real-Time Systems
  20. 1.2.2 Characteristics of Real-Time Systems
  21. 1.2.3 Hard and Soft Real-Time Systems  
  22. 1.3 The Future of Embedded Systems
  23. 1.4 Points to Remember
  24. Chapter 2: Basics Of Developing For Embedded Systems
  25. 2.1 Introduction
  26. 2.2 Overview of Linkers and the Linking Process
  27. 2.3 Executable and Linking Format
  28. Section header
  29. Program header
  30. 2.4 Mapping Executable Images into Target Embedded Systems
  31. 2.4.1 Linker Command File
  32. 2.4.2 Mapping Executable Images
  33. Module Upgradeability
  34. Memory Size Limitation
  35. Data Protection
  36. 2.4.3 Example in Practice
  37. 2.5 Points to Remember
  38. Chapter 3: Embedded System Initialization
  39. 3.1 Introduction
  40. 3.2 Target System Tools and Image Transfer
  41. 3.2.1 Embedded Loader
  42. 3.2.2 Embedded Monitor
  43. 3.2.3 Target Debug Agent
  44. 3.3 Target Boot Scenarios
  45. 3.3.1 Executing from ROM Using RAM for Data
  46. 3.3.2 Executing from RAM after Image Transfer from ROM
  47. 3.3.3 Executing from RAM after Image Transfer from Host
  48. 3.4 Target System Software Initialization Sequence
  49. 3.4.1 Hardware Initialization
  50. 3.4.2 RTOS Initialization
  51. 3.4.3 Application Software Initialization
  52. 3.5 On-Chip Debugging
  53. 3.6 Points to Remember
  54. Chapter 4: Introduction To Real-Time Operating Systems
  55. 4.1 Introduction
  56. 4.2 A Brief History of Operating Systems
  57. 4.3 Defining an RTOS
  58. 4.4 The Scheduler
  59. 4.4.1 Schedulable Entities
  60. 4.4.2 Multitasking
  61. 4.4.3 The Context Switch
  62. 4.4.4 The Dispatcher
  63. 4.4.5 Scheduling Algorithms
  64. Preemptive Priority-Based Scheduling
  65. Round-Robin Scheduling
  66. 4.5 Objects
  67. 4.6 Services
  68. 4.7 Key Characteristics of an RTOS
  69. 4.7.1 Reliability
  70. 4.7.2 Predictability
  71. 4.7.3 Performance
  72. 4.7.4 Compactness
  73. 4.7.5 Scalability
  74. 4.8 Points to Remember
  75. Chapter 5: Tasks
  76. 5.1 Introduction
  77. 5.2 Defining a Task
  78. 5.3 Task States and Scheduling
  79. 5.3.1 Ready State
  80. 5.3.2 Running State
  81. 5.3.3 Blocked State
  82. 5.4 Typical Task Operations
  83. 5.4.1 Task Creation and Deletion
  84. 5.4.2 Task Scheduling
  85. 5.4.3 Obtaining Task Information
  86. 5.5 Typical Task Structure
  87. 5.5.1 Run-to-Completion Tasks
  88. 5.5.2 Endless-Loop Tasks
  89. 5.6 Synchronization, Communication, and Concurrency
  90. 5.7 Points to Remember
  91. Chapter 6: Semaphores
  92. 6.1 Introduction
  93. 6.2 Defining Semaphores
  94. 6.2.1 Binary Semaphores
  95. 6.2.2 Counting Semaphores
  96. 6.2.3 Mutual Exclusion (Mutex) Semaphores
  97. Mutex Ownership
  98. Recursive Locking
  99. Task Deletion Safety
  100. Priority Inversion Avoidance
  101. 6.3 Typical Semaphore Operations
  102. 6.3.1 Creating and Deleting Semaphores
  103. 6.3.2 Acquiring and Releasing Semaphores
  104. 6.3.3 Clearing Semaphore Task-Waiting Lists
  105. 6.3.4 Getting Semaphore Information
  106. 6.4 Typical Semaphore Use
  107. 6.4.1 Wait-and-Signal Synchronization
  108. 6.4.2 Multiple-Task Wait-and-Signal Synchronization
  109. 6.4.3 Credit-Tracking Synchronization
  110. 6.4.4 Single Shared-Resource-Access Synchronization
  111. 6.4.5 Recursive Shared-Resource-Access Synchronization
  112. 6.4.6 Multiple Shared-Resource-Access Synchronization
  113. 6.5 Points to Remember
  114. Chapter 7: Message Queues
  115. 7.1 Introduction
  116. 7.2 Defining Message Queues
  117. 7.3 Message Queue States
  118. 7.4 Message Queue Content
  119. 7.5 Message Queue Storage
  120. 7.5.1 System Pools
  121. 7.5.2 Private Buffers
  122. 7.6 Typical Message Queue Operations
  123. 7.6.1 Creating and Deleting Message Queues
  124. 7.6.2 Sending and Receiving Messages
  125. Sending Messages
  126. Receiving Messages
  127. 7.6.3 Obtaining Message Queue Information
  128. 7.7 Typical Message Queue Use
  129. 7.7.1 Non-Interlocked, One-Way Data Communication
  130. 7.7.2 Interlocked, One-Way Data Communication
  131. 7.7.3 Interlocked, Two-Way Data Communication
  132. 7.7.4 Broadcast Communication
  133. 7.8 Points to Remember
  134. Chapter 8: Other Kernel Objects
  135. 8.1 Introduction
  136. 8.2 Pipes
  137. 8.2.1 Pipe Control Blocks
  138. 8.2.2 Pipe States
  139. 8.2.3 Named and Unnamed Pipes
  140. 8.2.4 Typical Pipe Operations
  141. Create and Destroy
  142. Read and Write
  143. Control
  144. Select
  145. 8.2.5 Typical Uses of Pipes
  146. 8.3 Event Registers
  147. 8.3.1 Event Register Control Blocks
  148. 8.3.2 Typical Event Register Operations
  149. 8.3.3 Typical Uses of Event Registers
  150. 8.4 Signals
  151. 8.4.1 Signal Control Blocks
  152. 8.4.2 Typical Signal Operations
  153. 8.4.3 Typical Uses of Signals
  154. 8.5 Condition Variables
  155. 8.5.1 Condition Variable Control Blocks
  156. 8.5.2 Typical Condition Variable Operations
  157. 8.5.3 Typical Uses of Condition Variables
  158. 8.6 Points to Remember
  159. Chapter 9: Other RTOS Services
  160. 9.1 Introduction
  161. 9.2 Other Building Blocks
  162. 9.2.1 TCP/IP Protocol Stack
  163. 9.2.2 File System Component
  164. 9.2.3 Remote Procedure Call Component
  165. 9.2.4 Command Shell
  166. 9.2.5 Target Debug Agent
  167. 9.2.6 Other Components
  168. 9.3 Component Configuration
  169. 9.4 Points to Remember
  170. Chapter 10: Exceptions and Interrupts
  171. 10.1 Introduction
  172. 10.2 What are Exceptions and Interrupts?
  173. 10.3 Applications of Exceptions and Interrupts
  174. 10.3.1 Internal Errors and Special Conditions Management
  175. 10.3.2 Hardware Concurrency and Service Request Management
  176. 10.4 A Closer Look at Exceptions and Interrupts
  177. 10.4.1 Programmable Interrupt Controllers and External Interrupts
  178. 10.4.2 Classification of General Exceptions
  179. 10.4.3 General Exception Priorities
  180. 10.5 Processing General Exceptions
  181. 10.5.1 Installing Exception Handlers
  182. 10.5.2 Saving Processor States
  183. 10.5.3 Loading and Invoking Exception Handlers
  184. 10.5.4 Nested Exceptions and Stack Overflow
  185. 10.5.5 Exception Handlers
  186. Exception Frames
  187. Differences between ESR and ISR  
  188. Exception Timing
  189. General Guides
  190. 10.6 The Nature of Spurious Interrupts
  191. 10.7 Points to Remember
  192. Chapter 11: Timer and Timer Services
  193. 11.1 Introduction
  194. 11.2 Real-Time Clocks and System Clocks
  195. 11.3 Programmable Interval Timers
  196. 11.4 Timer Interrupt Service Routines
  197. 11.5 A Model for Implementing the Soft-Timer Handling Facility
  198. 11.5.1 Possible Processing Delays
  199. 11.5.2 Implementation Considerations
  200. 11.6 Timing Wheels
  201. 11.6.1 Issues
  202. 11.6.2 Hierarchical Timing Wheels
  203. 11.7 Soft Timers and Timer Related Operations
  204. 11.8 Points to Remember
  205. Chapter 12: I/O Subsystem
  206. 12.1 Introduction
  207. 12.2 Basic I/O Concepts
  208. 12.2.1 Port-Mapped vs. Memory-Mapped I/O and DMA
  209. 12.2.2 Character-Mode vs. Block-Mode Devices
  210. 12.3 The I/O Subsystem  
  211. 12.3.1 Standard I/O Functions
  212. 12.3.2 Mapping Generic Functions to Driver Functions
  213. 12.3.3 Associating Devices with Device Drivers
  214. 12.4 Points to Remember
  215. Chapter 13: Memory Management
  216. 13.1 Introduction
  217. 13.2 Dynamic Memory Allocation in Embedded Systems
  218. 13.2.1 Memory Fragmentation and Compaction
  219. 13.2.2 An Example of malloc and free
  220. 13.2.3 Finding Free Blocks Quickly
  221. 13.2.4 The free Operation
  222. 13.3 Fixed-Size Memory Management in Embedded Systems
  223. 13.4 Blocking vs. Non-Blocking Memory Functions
  224. 13.5 Hardware Memory Management Units
  225. 13.6 Points to Remember
  226. Chapter 14: Modularizing An Application For Concurrency
  227. 14.1 Introduction
  228. 14.2 An Outside-In Approach to Decomposing Applications
  229. 14.3 Guidelines and Recommendations for Identifying Concurrency
  230. 14.3.1 Units of Concurrency
  231. 14.3.2 Pseudo versus True Concurrent Execution
  232. 14.3.3 Some Guidelines
  233. Guideline 1: Identify Device Dependencies
  234. Guideline 1a: Identify Active Devices
  235. Guideline 1b: Identify Passive Devices
  236. Guideline 2: Identify Event Dependencies
  237. Guideline 3: Identify Time Dependencies
  238. Guideline 3a: Identify Critical and Urgent Activities
  239. Guideline 3b: Identify Different Periodic Execution Rates
  240. Guideline 3c: Identify Temporal Cohesion
  241. Guideline 4: Identify Computationally Bound Activities
  242. Guideline 5: Identify Functional Cohesion
  243. Guideline 6: Identify Tasks that Serve Specific Purposes
  244. Guideline 7: Identify Sequential Cohesion
  245. 14.4 Schedulability Analysis-Rate Monotonic Analysis
  246. 14.4.1 Basic RMA Schedulability Test
  247. 14.4.2 Extended RAM Schedulability Test
  248. 14.5 Points to Remember
  249. Chapter 15: Synchronization And Communication
  250. 15.1 Introduction
  251. 15.2 Synchronization
  252. 15.2.1 Resource Synchronization
  253. 15.2.2 Activity Synchronization  
  254. 15.2.3 Implementing Barriers
  255. 15.3 Communication
  256. 15.4 Resource Synchronization Methods
  257. 15.4.1 Interrupt Locks
  258. 15.4.2 Preemption Locks
  259. 15.5 Critical Section Revisited
  260. 15.6 Common Practical Design Patterns
  261. 15.6.1 Synchronous Activity Synchronization
  262. Task-to-Task Synchronization Using Binary Semaphores
  263. ISR-to-Task Synchronization Using Binary Semaphores
  264. Task-to-Task Synchronization Using Event Registers
  265. ISR-to-Task Synchronization Using Event Registers
  266. ISR-to-Task Synchronization Using Counting Semaphores
  267. Simple Rendezvous with Data Passing
  268. 15.6.2 Asynchronous Event Notification Using Signals
  269. 15.6.3 Resource Synchronization
  270. Shared Memory with Mutexes
  271. Shared Memory with Interrupt Locks
  272. Shared Memory with Preemption Locks
  273. Sharing Multiple Instances of Resources Using Counting Semaphores and Mutexes
  274. 15.7 Specific Solution Design Patterns
  275. 15.7.1 Data Transfer with Flow Control
  276. 15.7.2 Asynchronous Data Reception from Multiple Data Communication Channels
  277. 15.7.3 Multiple Input Communication Channels
  278. 15.7.4 Using Condition Variables to Synchronize between Readers and Writers
  279. 15.7.5 Sending High Priority Data between Tasks
  280. 15.7.6 Implementing Reader-Writer Locks Using Condition Variables
  281. 15.8 Points to Remember
  282. Chapter 16: Common Design Problems
  283. 16.1 Introduction
  284. 16.2 Resource Classification
  285. 16.3 Deadlocks
  286. 16.3.1 Resource Request Models
  287. 16.3.2 Deadlock Detection
  288. Single-Instance Resource Deadlock Detection
  289. Multi-Instance Resource Deadlock Detection
  290. 16.3.3 Deadlock Recovery
  291. 16.3.4 Deadlock Avoidance
  292. 16.3.5 Deadlock Prevention
  293. 16.4 Priority Inversion
  294. 16.4.1 Priority Inheritance Protocol
  295. 16.4.2 Ceiling Priority Protocol
  296. 16.4.3 Priority Ceiling Protocol
  297. 16.5 Points to Remember
  298. Appendix A: References
  299. Примечания


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